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Ethernet in UX85 |
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Ethernet in UX85 |
The ECS
and DAQ rely on Ethernet. The racks counting houses D1, D2 and D3 are connected
with Ethernet cables ending in patch-panels. All connections in these barracks
are from patch-panels to patch-panels on certified Category 6 copper, unshielded
twisted pair cables. (Cat
6 UTP) 1000 BaseT. Some numbers to illustrate the size of the installation: An example photo
of the labelling is here.
The following table lists all connections from the subsystem racks in D3 to
the central racks in D2. The board entry is the number of TELL1, UKL1 or Readout
Supervisors, i.e. the boards which send data to the DAQ. The Creditcard PCs need
switches installed in the racks. These are are accounted for in the ECS racks.
Numbers
Document
The official reference for the cabling is
EDMS 497862.4 "Ethernet
cabling in UXA85 D1, D2, D3"
(pdf)Labeling Scheme
Each patch-panel carries a label, which identifies the patch-panel. Example D2C03B: A patch-panel in Rack C03 in the D2 barrack
. The last letter "B" indicates that it is the second patch-panel in this rack.
Each connected port on the patch-panels carries a label, which
identifies the destination of that port. Example D2D04C12: This port
is connected to port number 12, on the third patch-panel "C", in the 4th
rack in the "D" rack-row in the D2 barrack.Pictures
Connections in D3 (Subsystem racks)
SUBSYSTEM
LOCATION
# boards
ECS
D2C08
D2D04
D2D06
PP pos
# cables
MUONL0
D3A01
0
8
8
0
f
8
MUONL0
D3A02
0
0
0
0
b
0
MUONL0
D3A03
0
8
8
0
f
8
MUON
D3A04
15
8
8
60
b
68
MUON
D3A05
8
8
0
b
8
MUON
D3A06
8
8
0
b
8
CIE
D3A07
8
8
0
b
8
DSS
D3A08
0
0
n/a
0
CALOL0
D3B01
0
8
8
0
b
8
CALO
D3B02
23
8
8
92
b
100
CALO
D3B03
8
8
0
b
8
CALO
D3B04
8
8
b
8
CALO
D3B05
8
8
b
8
L0DU
D3B06
1
12
12
4
b
16
TFC
D3B07
8
12
12
16
f
28
TFC
D3B08
8
12
12
16
f
28
LHC
D3B09
0
12
12
0
f
12
RICH1
D3C01
11
8
8
44
b
52
RICH1
D3C02
12
12
b
12
RICH
D3C03
12
12
b
12
RICH2
D3C04
11
8
8
44
b
52
RICH2
D3C05
12
12
b
12
SPARE
D3C06
8
8
b
8
SPARE
D3C07
8
8
b
8
SPARE
D3C08
8
8
b
8
OT
D3D01
32
8
8
128
b
136
OT
D3D02
16
8
8
64
b
72
OT
D3D03
8
8
0
b
8
OT
D3D04
8
8
0
b
8
OT
D3D05
8
8
0
b
8
OT
D3D06
8
8
0
b
8
IT
D3D07
28
8
8
112
b
120
IT
D3D08
14
8
8
56
b
64
IT
D3D09
8
8
0
b
8
PUS
D3E01
0
12
12
0
b
12
VELO
D3E02
35
8
8
140
b
148
VELO
D3E03
36
8
8
144
b
152
VELO
D3E04
18
8
8
72
b
80
VELO
D3E05
8
8
0
b
8
VELO
D3E06
8
8
0
b
8
TT
D3E07
32
8
8
128
b
136
TT
D3E08
16
8
8
64
b
72
TT
D3E09
8
8
0
b
8
This page last edited by NN on September 28, 2005 .
